Junior Digital Design Engineer(m/f/d)

Location: Wien

Responsibilities:

  • Design and implementation of a distributed FPGA systems in System Verilog
  • Design closure (constraining, STA, etc.)
  • Participate in technical peer-reviewing within the team
  • Scripting (shell, Python, TCL, Perl, etc.) to automate design-flow and test procedures
  • Maintain source code with version control systems (mainly GIT)
  • Hardware bring-up, test automation, lab measurements and testing
  • Create and maintain specifications and documentation for different audiences

Qualifications:

  • University degree in Electrical Engineering / Computer Engineering / Embedded Systems or other comparable education
  • Strong technical and theoretical background in the area of Digital Design
  • Basic knowledge of embedded software development
  • 3+ years of industry experience in ASIC or FPGA design as a plus

We offer:

  • High-Tech Company with headquarter in Austria and international branches (Taiwan, Korea, USA)
  • Responsibility and opportunity to perform independent tasks in a dynamic company in an intercultural environment
  • Excellent professional and personal development opportunities in an international company
  • Top equipped workplaces (modern office, laptop, height adjustable desk)
  • A young and motivated team with short communication channels.
  • Annual gross salary starting from EUR 42.000,- depending on your qualification and professional experience

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