ASIC (front-end) Expert(m/w/d)

Location: Wien

Our Digital Design department contributes ASIC and FPGA systems for precise real-time control (with nanoseconds accuracy) and high-speed data transmission (x100Gbit/s) that meet very demanding requirements. Our ASICs are the heart of our product: Mask-writers for semiconductor industry. The ASICs are truly one-of-a-kind, and there are quite demanding and rather unusual requirements - all in all a very interesting development task.

Responsibilities:

  • RTL implementation in SystemVerilog, and constraining for ASIC technology
  • Architectural design,targeting a distributed FPGA/ASIC system
  • Integration of IP components and test infrastructure
  • Scripting (TCL, Python) to automate design-flow and test procedures
  • Close collaboration with design partners for back-end tasks
  • Create and maintain specifications and documentation for different audiences
  • Hardware bring-up, test automation and testingand on-site

Qualifications:

  • University degree in Electrical Engineering or Computer Engineering
  • Strong technical and theoretical background of digital VLSI design
  • 7+ years of hands-on experience in ASIC front-end design (including RTL coding, Synthesis, STA, DFT implementation)
  • Contribution to successful tape-outs targeting state-of-the-art CMOS nodes
  • ASIC back-end flow experience as a plus
  • Good command of English with German skills as a plus

We offer:

  • A young and motivated intercultural team with short communication channels
  • An exciting occupation with complex, technical challenges
  • A culture, welcoming high engagement and entrusting you with a broad range of duties
  • Excellent professional and personal development opportunities
  • Annual gross salary: from EUR 50.000,-- open to negotiation depending on qualifications and experience

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